| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device in which occurrence of short circuit can be suppressed between a capacitive contact plug and a bit contact plug and a gate electrode, while enhancing the characteristics of a transistor. ! SOLUTION: A plurality of second element isolation regions 18, extending in a direction crossing a first element isolation region and having a protrusion 18A protruding from the principal surface 15a of a semiconductor substrate 15, are formed on the semiconductor substrate 15. Subsequently, a mask 93 for forming a gate electrode groove is formed on two side faces 18a of the protrusion 18A. Thereafter, a gate electrode groove 22 is formed by performing anisotropic etching of the semiconductor substrate 15 and first element isolation region, via the mask 93 for forming a gate electrode groove. Finally, a gate electrode 25 is formed, respectively, on two side faces 22a of the gate electrode groove 22 facing each other, via a gate insulating fi |
