| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a clock signal adjustment circuit for a liquid crystal display device which implements an easier operation of adjusting a clock signal by automating the adjustment of the clock signal.SOLUTION: A fixed delay circuit 22 delays a first signal by a first amount of delay to output a first delayed signal. A variable delay circuit 23 delays a first clock signal by a second amount of delay to generate a first adjusted clock signal that is a version of the first clock signal phase-adjusted relative to the first signal. An exclusive OR circuit 24 performs an exclusive OR operation on the first delayed signal and the first adjusted clock signal. An adjustment signal generation circuit 25 integrates an operation result of the exclusive OR circuit 24, and generates a first adjustment signal for adjusting the second amount of delay of the variable delay circuit 23 such that an integrated value is a voltage that is an average of a low level voltage and a high level voltage of the first adjusted clock signal.</p> |
