发明名称 LIFE ASSESSMENT METHOD FOR SEMICONDUCTOR ELEMENT
摘要 <p>PROBLEM TO BE SOLVED: To estimate hot carrier life in consideration of influences caused by process variation in gate length, and to improve assessment accuracy.SOLUTION: A life assessment method for a semiconductor element includes: a step S2 of dividing a plurality of assessment target MOS transistors into a plurality of groups; a step S3 of performing an acceleration test by using a plurality of biases that are higher than an operation voltage and different from each group, to the MOS transistors; a step S4 of estimating each hot carrier life at the plurality of biases for each of the plurality of groups; steps S5 and S6 of measuring gate lengths of the MOS transistors and estimating each gate length; a step S7 of further dividing the MOS transistors depending on variation in gate length, in response to the assessment result of the gate lengths; and a step S8 of estimating the hot carrier life at the operation voltage of the MOS transistors by using data of hot carrier life in the acceleration test.</p>
申请公布号 JP2015002242(A) 申请公布日期 2015.01.05
申请号 JP20130125646 申请日期 2013.06.14
申请人 TOSHIBA CORP 发明人 KAKUMOTO YUICHI;MURAKAMI KAZUYA;SATO SUSUMU
分类号 H01L21/66;G01R31/26;H01L21/336;H01L29/78 主分类号 H01L21/66
代理机构 代理人
主权项
地址
您可能感兴趣的专利