发明名称 DATA-MASKED ANALOG AND DIGITAL READ FOR RESISTIVE MEMORIES
摘要 An analog read circuit measures the resistance of each of a plurality of bits in an array of resistive memory elements. Data stored within a latch determines whether to selectively enable the analog read circuit. In an alternate embodiment, a sense amplifier is coupled to the latch and the array, and the data stored in the latch determines whether to selectively enable the sense amplifier.
申请公布号 US2015003145(A1) 申请公布日期 2015.01.01
申请号 US201414463454 申请日期 2014.08.19
申请人 Everspin Technologies, Inc. 发明人 Alam Syed M.;Andre Thomas W.
分类号 G11C11/16;G11C13/00 主分类号 G11C11/16
代理机构 代理人
主权项 1. A method of operation of a memory that includes an array of resistive memory elements, the method comprising: storing data in circuitry of the memory, the data to select a portion of a page within the array of resistive memory elements; performing an activate operation on the portion of the page selected by the data, wherein the activate operation reads data from the portion of the page and stores the data read from the portion of the page in data storage circuitry of the memory; after performing the activate operation, performing at least one of: 1) a read operation that reads data from the data storage circuitry corresponding to the portion of the page, and 2) a write operation that writes data to the data storage circuitry corresponding to the portion of the page; and after performing the at least one of the read operation and the write operation, performing a precharge operation for the portion of the page, wherein the precharge operation writes back data stored in the data storage circuitry corresponding to the portion of the page to the array of resistive memory elements.
地址 Chandler AZ US