MULTIFUNCTIONAL HEXADECIMAL INSTRUCTION FORM SYSTEM AND PROGRAM PRODUCT

摘要

A new zSeries floating-point unit has a fused multiply-add dataflow capable of supporting two architectures and fused MULTIPLY and ADD and Multiply and SUBTRACT in both RRF and RXF formats for the fused functions. Both binary and hexadecimal floating-point instructions are supported for a total of 6 formats. The floating-point unit is capable of performing a multiply-add instruction for hexadecimal or binary every cycle with a latency of 5 cycles. This supports two architectures with two internal formats with their own biases. This has eliminated format conversion cycles and has optimized the width of the dataflow. The unit is optimized for both hexadecimal and binary floating-point architecture supporting a multiply-add/subtract per cycle.

主权项

1. A computer system supporting both Binary Floating Point (BFP) operations and non-BFP floating point operations, wherein the non-BFP floating point operations comprise Hexadecimal Floating Point (HFP) operations, the computer system comprising:
computer memory; a processor in communications with the computer memory the processor comprising an instruction fetching element for fetching instructions from memory to perform a method comprising: providing at least three operands of a combination multiply add/subtract instruction to a main fraction dataflow element of a floating point element, each of said operands comprising BFP floating point format values or non-BFP floating point format values, said non-BFP floating point format values comprising floating point format values other than BFP format values, and said main fraction dataflow element configured to process both BFP floating point format values and non-BFP floating point format values for said operands; responsive to the combined multiply add/subtract instruction being a non-BFP floating point multiply add/subtract instruction, the main fraction dataflow element performing a non-BFP floating point operation on the three operands to produce a non-BFP main fraction result, the operation specified by the combination multiply add/subtract instruction, the non-BFP main fraction result comprising non-BFP floating point format fraction values; and responsive to the combined multiply add/subtract instruction being a BFP multiply add/subtract instruction, the main fraction dataflow element performing a BFP operation on the three operands to produce a BFP main fraction result, the operation specified by the combination multiply add/subtract instruction, the BFP main fraction result comprising BFP format fraction values.