发明名称 Semiconductor Memory Device
摘要 A semiconductor device comprises a first pair of signal lines and a first control circuit. The first control circuit precharges each of the first pair of signal lines to a first voltage in response to a precharge signal, and changes the voltage level of each of the first pair of signal lines to a second voltage different from the first voltage when a deep power down signal is input.
申请公布号 US2015003178(A1) 申请公布日期 2015.01.01
申请号 US201414487379 申请日期 2014.09.16
申请人 PS4 Luxco S.a.r.l. 发明人 Nomoto Keisuke;Nakaoka Yuji
分类号 G11C5/14;G11C7/12 主分类号 G11C5/14
代理机构 代理人
主权项 1. A method comprising: supplying an clock signal to a peripheral circuit, the peripheral circuit being connected to a memory cell array; supplying an operation voltage to the memory cell array and the peripheral circuit during normal operation mode; stopping the supply of the operation voltage to the memory cell array without stopping the supply of the operation voltage to the peripheral circuit during deep power down mode in which the generation of the clock signal is stopped.
地址 Luxembourg LU