发明名称 |
MOS P-N junction diode with enhanced response speed and manufacturing method thereof |
摘要 |
A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed. |
申请公布号 |
US8921949(B2) |
申请公布日期 |
2014.12.30 |
申请号 |
US201213726740 |
申请日期 |
2012.12.26 |
申请人 |
PFC Device Corp. |
发明人 |
Chao Kou-Liang;Kuo Hung-Hsin;Su Tse-Chuan;Chen Mei-Ling |
分类号 |
H01L29/76;H01L29/94;H01L29/66;H01L29/78 |
主分类号 |
H01L29/76 |
代理机构 |
WPAT, PC |
代理人 |
WPAT, PC ;King Justin |
主权项 |
1. A MOS P-N junction diode, comprising:
a semiconductor substrate; a mask layer formed on the semiconductor substrate, wherein a surface of the mask layer is partially exposed; a guard ring layer formed in the semiconductor substrate by an ion implantation process and a thermal drive-in process, wherein a first side of the guard ring layer is connected with the mask layer; a gate oxide layer formed on a part of the semiconductor substrate; a polysilicon structure formed on the gate oxide layer; a central conductive layer formed in the semiconductor substrate by another ion implantation process, wherein a part of the central conductive layer is connected with a second side of the guard ring layer, and the central conductive layer is separated from the gate oxide layer; a silicon nitride layer formed on a part of the surface of the central conductive layer, and located at bilateral sides of the polysilicon structure, wherein the silicon nitride layer is protruded over the polysilicon structure; a metal diffusion layer formed within the guard ring layer and the central conductive layer by diffusion; a channel region formed in the semiconductor substrate by a further ion implantation process, wherein the channel region is located beside the central conductive layer and disposed under the gate oxide layer; and a metallic sputtering layer formed on the mask layer, the polysilicon structure, the guard ring layer, the central conductive layer and the silicon nitride layer. |
地址 |
New Taipei TW |