Fixed-coefficient variable prime length recursive discrete Fourier transform system

摘要

A fixed-coefficient variable prime length recursive discrete Fourier transform system includes a pre-processing device, a real-part computation device, an imaginary-part computation device and a post-processing device. The pre-processing device receives N digital input signals and performs order permutation operation to generate first and second temporal signals, wherein N is a prime number. The real-part computation device receives the real part of the first and second temporal signals and performs discrete cosine/sine transform to generate third and fourth temporal signals. The imaginary-part computation device receives the imaginary part of the first and second temporal signals and performs discrete cosine/sine transform to generate fifth and sixth temporal signals. The post-processing device receives the third, fourth, fifth and sixth temporal signals to perform order permutation and addition operations for generating N digital output signals, wherein the N digital output signals are the discrete Fourier transform of the N digital signals.

主权项

1. A fixed-coefficient variable prime length recursive discrete Fourier transform system, comprising:
a pre-processing device for receiving N input digital signals and performing an order permutation operation to the N input digital signals, so as to generate a first temporal signal and a second temporal signal, where N is a prime number; a real-part computation device connected to the pre-processing device for receiving real part of the first temporal signal and real part of the second temporal signal and performing a recursive discrete cosine/sine operation, so as to generate a third temporal signal and a fourth temporal signal; an imaginary-part computation device connected to the pre-processing device for receiving imaginary part of the first temporal signal and imaginary part of the second temporal signal and performing a recursive discrete cosine/sine operation, so as to generate a fifth temporal signal and a sixth temporal signal; and a post-processing device connected to the real-part computation device and the imaginary-part computation device for receiving the third temporal signal, the fourth temporal signal, the fifth temporal signal and the sixth temporal signal, and performing an order permutation operation and addition operation, so as to generate N output signals, wherein the N output signals are discrete Fourier transform of the N input digital signals; wherein the real-part computation device and the imaginary-part computation device have same hardware architecture, the real-part computation device has a first adder and a first delay device and the imaginary-part computation device has a first adder and a first delay device; the first adder and the first delay device of the real-part computation device and the first adder and the first delay device of the imaginary-part computation device are used to compute a first output signal from the N output signals.