Method of identifying damaged bitline address in non-volatile

摘要

A method of identifying a damaged bitline address in a non-volatile memory device is introduced. The non-volatile memory device includes a memory cell array and a plurality of bit lines crossing the memory cell array. Each bit line has a first end and a second end. The bit lines are divided into a first group and a second group. The method includes applying a source voltage (charging) or ground voltage (discharging) to a specific group of bit lines, testing the bit lines in two testing stages (open-circuit testing and short-circuit testing) by the principle that no damaged bit line can be charged or discharged, and acquiring an address data of a damaged bit line according to a status data stored in a page buffering circuit and related to whether a bit line is damaged, thereby dispensing with a calculation process for estimating the address of the damaged bit line.

主权项

1. A method of identifying a damaged bitline address in a non-volatile memory device, the non-volatile memory device comprising a memory cell array and a plurality of bit lines crossing the memory cell array, the bit lines having a first end and a second end each and being divided into a first group and a second group, the method comprising the steps of:
S100: resetting a page buffering circuit; S200: performing a bitline damage test so as to store in the page buffering circuit a status data as to whether a bit line is damaged; S300: reading the bit lines in the page buffering circuit in sequence according to a sequence of the addresses of the bit lines of each memory cell and identifying the status data as to whether any one of the bit lines is damaged; and S400: latching a corresponding address when the status data indicate a logical level of a damaged status and treating the latched address as the address of the damaged bit line; wherein the step S200 further comprises the sub-steps of:
applying a supply voltage to the first-group bit lines via the first end thereof so as to perform a charge process and applying a ground voltage to the second-group bit lines;terminating the charge process of the first-group bit lines and applying a ground voltage to the first-group bit lines via the second end thereof so as to perform a discharge process; and evaluating the status of each bit line of the first group according to the voltage level thereof, wherein it will be determined that a bit line has developed an open circuit and thereby has got damaged if the voltage level of the bit line is not a ground voltage applying a supply voltage to the second-group bit lines via the second end thereof so as to perform the charge process, and applying a ground voltage to the first-group bit lines via the first end thereof so as to perform the discharge process; terminating the discharge process of the first-group bit lines; and evaluating the status of each bit line of the first group according to the voltage level thereof, wherein it will be determined that a bit line has developed a short circuit together with an adjacent bit line and thereby has got damaged if the voltage level of the bit line is not a ground voltage, wherein the first end of the bit lines receives a voltage from the page buffering circuit of the non-volatile memory device, and a data about whether open-circuit damage occurs to the bit line is stored in the page buffering circuit.