Providing a consolidated sideband communication channel between devices

摘要

In an embodiment, the present invention includes a protocol stack having a transaction layer and a link layer. In addition a first physical (PHY) unit is coupled to the protocol stack to provide communication between a processor and a device coupled to the processor via a physical link, where the first PHY unit is of a low power communication protocol and includes a first physical unit circuit. In turn, a second PHY unit is coupled to the protocol stack to provide communication between the processor and the device via a sideband channel coupled between the multicore processor and the device separate from the physical link, where the second PHY unit includes a second physical unit circuit. Other embodiments are described and claimed.

主权项

1. An apparatus comprising:
a logic to operate a Peripheral Component Interconnect Express™ (PCIe™) based transaction layer and a link layer; a first physical (PHY) unit coupled to the logic to transmit and receive data via a physical link; and a second PHY unit coupled to the logic to transmit and receive data via a second physical link, the second PHY unit comprising a M-PHY electrical layer and a logical layer to interface the logic with the M-PHY electrical layer, the logical layer including a link training and status state machine (LTSSM) to perform link training of the second physical link and to support a multi-lane configuration of the second physical link.