System and method for cycle slip correction

摘要

A system and method including a parity bit encoder for encoding each n bits of data to be transmitted with a parity check bit to produce blocks of n+1 bits (n information bits plus one parity bit associated with the n information bits). Each of the blocks of n+1 bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A maximum a posteriori (MAP) decoder is used at the receiver to correct for cycle slip. Phase errors of 180 degrees may be detected by independently encoding odd and even bits prior to Gray mapping, and identifying errors in decoding odd numbered bits at the receiver.

主权项

1. A system comprising:
a parity bit encoder configured to encode successive blocks of n bits with a parity bit to provide successive blocks of n+1 bits; a Gray mapper coupled to said parity bit encoder and configured to map each one of said blocks of n+1 bits to an associated plurality of quadrature amplitude modulated (QAM) symbols; a modulator coupled to said Gray mapper and configured to modulate an optical signal in response to an output of said Gray mapper to provide a modulated optical signal comprising said associated plurality of QAM symbols; a detector for receiving said modulated optical signal and providing an electrical signal representative of said optical signal; and a de-mapper configured to provide a de-mapper output representative of said blocks of n bits in response to said electrical signal, said de-mapper being further configured to cause correction of cycle slip using parity indicated by said parity bit.