| 发明名称 | Memory control device | ||
| 摘要 | A memory control device that can reduce a power consumption at the time of writing a memory. The memory control device includes a data output buffer circuit that burst-transfers data to a memory device through a data bus, and a mask signal output buffer circuit that outputs, to the memory device, a mask signal indicative of data that prohibits write into a memory cell within the memory device among the data. The data output buffer circuit puts an output node into a high impedance state when the mask signal is indicative of write prohibition. | ||
| 申请公布号 | US8923075(B2) | 申请公布日期 | 2014.12.30 |
| 申请号 | US201213657281 | 申请日期 | 2012.10.22 |
| 申请人 | Renesas Electronics Corporation | 发明人 | Okubo Junya |
| 分类号 | G11C7/00;G11C7/10 | 主分类号 | G11C7/00 |
| 代理机构 | Foley & Lardner LLP | 代理人 | Foley & Lardner LLP |
| 主权项 | 1. A memory control device, comprising: a data output buffer circuit that burst-transfers data to a memory device through a data bus; and a mask signal output buffer circuit that outputs, to the memory device, a mask signal indicative of data that prohibits write into a memory cell within the memory device among the data, wherein the data output buffer circuit puts an output node into a high impedance state when the mask signal is indicative of write prohibition. | ||
| 地址 | Kanagawa JP | ||