Analysing timing paths for circuits formed of standard cells

摘要

A method of performing and correcting a timing analysis performed by a data processing apparatus on a circuit formed of a plurality of cells to account for the reverse Miller effect. The timing analysis steps includes identifying cells on and in parallel with a signal path that are driven by a same signal and determining an output transition time and a delay using the characterization data for the cell. The correcting steps includes providing further characterization data for some of the cells; correcting the output transition time for some of the cells by increasing the output transition time by an amount dependent upon the Miller capacitance for the cell and using the correction to the output transition time to correct an input transition time for a next cell; and calculating a time taken for a data signal to travel along the signal path from the delay times.

主权项

1. A method of correcting a timing analysis performed by a data processing apparatus on a circuit formed of a plurality of cells to account for the reverse Miller effect, said data processing apparatus having access to timing characterisation data that provides timing characteristics for each of said plurality of cells, said timing characterisation data indicating output transition times and delay times for a signal passing through said cell in dependence upon transition times of said signal and a loading on said cell, wherein said timing analysis comprises:
for a signal path: identifying cells on said signal path and cells in parallel to said cells on said signal path that are driven by a same signal, and for each cell on said signal path, determining from an input transition time and a load on said cell, an output transition time and a delay using said characterisation data for said cell, an output transition time calculated for a first cell on said signal path being used as a basis for an input transition time for a next cell on said signal path;wherein said correcting steps comprise:
providing further characterisation data for at least some of said cells, said further characterisation data including a Miller capacitance of at least a portion of said cell; correcting said determined output transition time for said at least some of said cells by increasing said output transition time by an amount dependent upon said Miller capacitance for said cell and for said at least some of said cells that are in parallel to said cell and are driven by a same signal; using said correction to said output transition time to correct an input transition time for a next cell when calculating said delay time and said output transition time for said next cell; calculating a time taken for a data signal to travel along said signal path from said delay times determined using said corrected output transition times.