Transactional cache memory system

摘要

A method for providing a transactional memory is described. A cache coherency protocol is enforced upon a cache memory including cache lines, wherein each line is in one of a modified state, an owned state, an exclusive state, a shared state, and an invalid state. Upon initiation of a transaction accessing at least one of the cache lines, each of the lines is ensured to be either shared or invalid. During the transaction, in response to an external request for any cache line in the modified, owned, or exclusive state, each line in the modified or owned state is invalidated without writing the line to a main memory. Also, each exclusive line is demoted to either the shared or invalid state, and the transaction is aborted.

主权项

1. A method for providing transactional memory, comprising:
enforcing a cache coherency protocol upon a cache memory including first cache lines, wherein each first cache line is in one of a modified state, an owned state, an exclusive state, a shared state, and an invalid state; upon initiation of a first transaction accessing at least one of the first cache lines, ensuring each first cache line is in one of the shared state and the invalid state, the ensuring including writing back to main memory each cache line in the modified state and each cache line in the owned state; and during the first transaction, in response to a first external request for any first cache line in the modified state, the owned state, or the exclusive state:
invalidating each first cache line in the modified state and each cache line in the owned state without writing the first cache line to a main memory;demoting each first cache line in the exclusive state to one of the shared state and the invalid state;aborting the first transaction; and reattempting the first transaction after the aborting.