发明名称 CIRCUIT FOR ADJUSTING CLOCK PHASE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
摘要 <p>A semiconductor device includes: a buffer configured to receive an input signal; a clock buffer configured to receive a clock; a delay locked loop configured to delay the clock to compensate a path difference between the input signal and the clock; a code generator configured to generate a digital code corresponding to 1/N times the clock period (N is an integer greater than or equal to 2); a delay unit configured to delay the clock compensated by the delay locked loop by a value corresponding to the digital code; and a strobing unit configured to strobe the input signal using the clock delayed by the delay unit.</p>
申请公布号 KR20140147179(A) 申请公布日期 2014.12.30
申请号 KR20130069550 申请日期 2013.06.18
申请人 SK HYNIX INC. 发明人 KIM, DAE SUK
分类号 G11C7/22;G11C7/10;G11C8/00 主分类号 G11C7/22
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