发明名称 PROCEDE DE DURCISSEMENT LOGIQUE PAR PARTITIONNEMENT D'UN CIRCUIT ELECTRONIQUE
摘要 <p>The method relates to a method for the radiation hardening of an electronic circuit by partitioning, said circuit including an odd number K of parallel branches connected to a same primary input I and each including a same series of N modules and N−1 nodes linking two consecutive modules, the K branches together forming a series of N−1 gates respectively consisting of parallel K nodes, and a primary arbiter forming a majority vote from the output signal of the K branches, the method being characterized in that it includes the following steps which are repeated for each one of the gates: determining a reliability of a subcircuit upstream from the gate consisting of the portions of the K branches located between the primary input and the gate, and the insertion of at least one arbiter at the gate forming a majority vote from the output signals of said portions of branches constituting the scanned subcircuit and outputting at least one majority signal to the respective inputs of an additional subcircuit formed by the branch portions downstream from the gate, if the reliability of the scanned subcircuit is less than a reliability set point.</p>
申请公布号 FR2998688(B1) 申请公布日期 2014.12.26
申请号 FR20120061439 申请日期 2012.11.29
申请人 ELECTRICITE DE FRANCE 发明人 COUSIN BASTIEN;DELEUZE GILLES;CRETINON LAURENT;GONCALVES DOS SANTOS GUTEMBERG JR;NAVINER LIRIDA
分类号 G06F11/18 主分类号 G06F11/18
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