发明名称 |
Active Clamps for Multi-Stage Amplifiers in Over/Under-Voltage Condition |
摘要 |
The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described, having a differential amplification stage configured to provide a stage output voltage at an output node, based on a first input voltage and a second input voltage. Furthermore, the multi-stage amplifier comprises a second amplification stage comprising an amplifier current source configured to provide an amplifier current; and an amplifier transistor arranged in series with the amplifier current source; wherein a gate of the amplifier transistor is coupled to the output node of the differential amplification stage. In addition, the multi-stage amplifier comprises a detection circuit. |
申请公布号 |
US2014375289(A1) |
申请公布日期 |
2014.12.25 |
申请号 |
US201414191624 |
申请日期 |
2014.02.27 |
申请人 |
Dialog Semiconductor GmbH |
发明人 |
Kronmueller Frank;Uka Mahir |
分类号 |
G05F1/56 |
主分类号 |
G05F1/56 |
代理机构 |
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代理人 |
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主权项 |
1) A multi-stage amplifier comprising
a differential amplification stage configured to provide a stage output voltage at an output node, based on a first input voltage at a first input node and a second input voltage at a second input node; a second amplification stage comprising
an amplifier current source configured to provide an amplifier current; andan amplifier transistor arranged in series with the amplifier current source; wherein a gate of the amplifier transistor is coupled to the output node of the differential amplification stage; and a detection circuit comprising
a detection current source configured to provide a detection current; anda detection transistor arranged in series with the detection current source; wherein a gate of the detection transistor is coupled to the output node of the differential amplification stage; wherein a mid-point between the detection current source and an input node of the detection transistor forms a sensing point;wherein the second amplification stage and the detection circuit are arranged in parallel; wherein the detection circuit is configured such that the sensing point changes from a default state to a detection state, subject to the stage output voltage at the output node deviating from a default voltage by at least a pre-determined threshold value. |
地址 |
Kirchheim/Teck-Nabern DE |