| 发明名称 |
INITIATION OF CACHE FLUSHES AND INVALIDATIONS ON GRAPHICS PROCESSORS |
| 摘要 |
Methods and systems may provide for receiving, at a graphics processor, a workload from a host processor and using a kernel on the graphics processor to issue a thread group for execution of the workload on the graphics processor. Additionally, one or more coherency messages may be initiated, by the graphics processor, in response to a thread-related condition of one or more caches on the graphics processor. In one example, the thread-related condition is associated with the execution of the workload on the graphics processor and indicates that the one or more caches on the graphics processor are not coherent with a system memory associated with the host processor. |
| 申请公布号 |
US2014379993(A1) |
申请公布日期 |
2014.12.25 |
| 申请号 |
US201313926328 |
申请日期 |
2013.06.25 |
| 申请人 |
Gupta Niraj;Jiang Hong |
发明人 |
Gupta Niraj;Jiang Hong |
| 分类号 |
G06F12/08;G06F12/12 |
主分类号 |
G06F12/08 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A system comprising:
a host processor; a system memory associated with the host processor; a bus coupled to the host processor; and a graphics processor coupled to the bus, the graphics processor to receive a workload from the host processor and including,
a plurality of caches, anda kernel to issue a thread group for execution of the workload on the graphics processor, wherein the graphics processor is to initiate one or more coherency messages in response to a thread-related condition of one or more of the plurality of caches. |
| 地址 |
Bangalore IN |
