发明名称 FAILURE MONITORING DEVICE FOR POWER CONVERSION APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a failure monitoring device for a power conversion apparatus capable of suppressing a data bus width of a memory from limiting the number of gate pulses which can be acquired, and, at the same time, storing gate pulse data and monitor data in the same memory.SOLUTION: The failure monitoring device for the power conversion apparatus comprises: a write buffer 76 in which write data to be stored in a monitor memory are written; a plurality of write data generation circuits 60 and 70a-70n each for generating write data of gate pulse data and monitor data for the write buffer; a buffer access circuit 75 which performs write processing to the write buffer on the generated write data; a read buffer 82 in which the gate pulse data and the monitor data read out of the monitor memory are written when analyzing a failure of the power conversion apparatus; and an access control circuit 90 which performs write/read processing with respect to the monitor memory and performs input/output processing with respect to the write buffer and the read buffer.
申请公布号 JP2014241704(A) 申请公布日期 2014.12.25
申请号 JP20130123997 申请日期 2013.06.12
申请人 FUJI ELECTRIC CO LTD 发明人 KAI SATOSHI
分类号 H02M1/00;G01R31/00;H02M7/48 主分类号 H02M1/00
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