RESISTANCE CHANGE MEMORY CELL CIRCUITS AND METHODS

摘要

The gate of the access transistor of a 1 transistor 1 resistor (1T1R) type RRAM cell is biased relative to the source of the access transistor using a current mirror. Under the influence of a voltage applied across the 1T1R cell (e.g., via the bit line), the RRAM memory element switches from a higher resistance to a lower resistance. As the RRAM memory element switches from the higher resistance to the lower resistance, the current through the RRAM cell switches from being substantially determined by the higher resistance of the RRAM device (while the access transistor is operating in the linear region) to being substantially determined by the saturation region operating point of the access transistor.

主权项

1. A memory device comprising:
memory cells each having a resistance which is changeable from at least a first resistance to a second resistance; a first voltage generating circuit to generate a voltage to apply to a terminal of at least one of the memory cells; and a second voltage generating circuit to generate a bias voltage to be applied to a control node of the of memory cells, the bias voltage determining an operating point of a transistor that establishes a current to flow through the transistor, the current to flow through at least one variable resistive device of the memory cell to change the resistance of the at least one variable resistive device from the first resistance to the second resistance while being limited by the operating point of the transistor.