发明名称 |
MANAGING A TRANSLATION LOOKASIDE BUFFER |
摘要 |
Method and apparatus for managing a translation lookaside buffer (TLB) at hardware in a virtualization enabled system. According to embodiments of the present invention, a series of operations caused by TLB miss would not need intervening from the hypervisor. On the contrary, when a TLB miss occurs, the hardware directly issues an interrupt to a virtual machine. In this way, the TLB can be efficiently managed by means of a hardware-level auxiliary translation table. Therefore, system overheads can be greatly reduced and system performance can be improved. Methods and apparatuses associated with hardware, hypervisor, and virtual machine in a virtualization enabled system are disclosed, respectively. |
申请公布号 |
US2014379956(A1) |
申请公布日期 |
2014.12.25 |
申请号 |
US201414306790 |
申请日期 |
2014.06.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Chang Xiao Tao;Franke Hubertus;Ge Yi;Wang Kun |
分类号 |
G06F12/10;G06F9/455 |
主分类号 |
G06F12/10 |
代理机构 |
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代理人 |
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主权项 |
1. A method for managing a translation lookaside buffer (TLB) at hardware in a virtualization enabled system, the method comprising:
querying the TLB with a guest virtual address indicated by a memory access instruction, the memory access instruction being received from a virtual machine running in the virtualization enabled system; in response to a miss of the guest virtual address in the TLB, issuing an interrupt to the virtual machine to cause the virtual machine to process the miss; and managing the TLB using an auxiliary translation table based on a result of a processing of the miss by the virtual machine, wherein an entry of the auxiliary translation table maps a guest physical address to a host physical address in the virtualization enabled system. |
地址 |
Armonk NY US |