VERTICAL POWER TRANSISTOR WITH BUILT-IN GATE BUFFER

摘要

A vertical power transistor is monolithically packaged on a semiconductor die with gate buffer circuitry. The gate buffer circuitry is adapted to deliver a biasing voltage to a gate contact of the vertical power transistor for switching the device between an ON state and an OFF state. By monolithically packaging the gate buffer circuitry together with the vertical power transistor, parasitic inductance between the gate buffer circuitry and the gate of the vertical power transistor is minimized, thereby decreasing the switching time of the vertical power transistor and reducing switching noise.

主权项

1. A semiconductor device comprising:
a semiconductor die; a vertical power transistor formed on the semiconductor die; and gate buffer circuitry formed on the semiconductor die and adapted to selectively deliver a biasing signal to a gate contact of the vertical power transistor for switching the vertical power transistor between an ON state and an OFF state.