METHODS AND APPARATUS FOR AN ISFET

摘要

An ISFET includes a control gate coupled to a floating gate in a CMOS device. The control gate, for example, a poly-to-well capacitor, is configured to receive a bias voltage and effect movement of a trapped charge between the control gate and the floating gate. The threshold voltage of the ISFET can therefore by trimmed to a predetermined value, thereby storing the trim information (the amount of trapped charge in the floating gate) within the ISFET itself.

主权项

1. A method of forming a CMOS ISFET, comprising:
providing a substrate; forming a floating gate structure over the substrate; and forming a control gate structure communicatively coupled to the floating gate structure, such that the control gate is configured to receive a bias voltage and effect transfer of charge selectively between the floating gate structure and the control gate structure.