NON-PLANAR SEMICONDUCTOR DEVICE HAVING DOPED SUB-FIN REGION AND METHOD TO FABRICATE SAME
摘要
Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are described. For example, a method of fabricating a semiconductor structure involves forming a plurality of semiconductor fins above a semiconductor substrate. A solid state dopant source layer is formed above the semiconductor substrate, conformal with the plurality of semiconductor fins. A dielectric layer is formed above the solid state dopant source layer. The dielectric layer and the solid state dopant source layer are recessed to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins. The method also involves driving dopants from the solid state dopant source layer into the sub-fin regions of each of the plurality of semiconductor fins.
申请公布号
WO2014204477(A1)
申请公布日期
2014.12.24
申请号
WO2013US46902
申请日期
2013.06.20
申请人
INTEL CORPORATION;GHANI, TAHIR;LATIF, SALMAN;MUNASINGHE, CHANAKA D.