| 摘要 |
A signal demultiplexer includes a conversion unit that converts a format of a high speed signal transfer frame output from a terminating unit into a format of a converted frame; a parallelization unit that parallelizes the converted frame and outputs a predetermined number of data columns; and a separating unit that separates plural low speed signal transfer frames from the predetermined number of the data columns. The conversion unit converts the format of the high speed signal transfer frame into the format of the converted frame by delaying a signal storing area using first and second overhead areas, to include an“i”th tributary slot among the predetermined number of the tributary slots assigned to the signal storing area into an arbitrary“i”th data column among the predetermined number of the data columns, and to align front positions of the predetermined number of the data columns. |
