Integrated circuit schematics having imbedded scaling information for generating a design instance

摘要

A non-transitory computer-readable memory including first data representative of a topology of a circuit including a first circuit element and a second circuit element, and second data representative of a scaling rule for the first circuit element as a function of the second circuit element. A data processing method comprising retrieving first data representative of a topology of a circuit comprising a first circuit element and a second circuit element from a memory, retrieving second data representative of a scaling rule for the first circuit element as a function of the second circuit element from the memory, receiving a user input representative of a scaling factor, generating third data representative of an instance of the second circuit element using the scaling factor, and generating data representative of an instance of the first circuit element using the scaling factor, the scaling rule and the third data.

主权项

1. A method of modifying a topology representation of a circuit, said topology representation comprising a list of circuit elements, which are interconnected, wherein each of said circuit elements has a predetermined number of attributes related to a manufacturing process of integrated circuits, said method comprising:
employing a computer for using data representing a circuit schematic for each of said circuit elements; and replacing at least one of said predetermined number of attributes specifying a scaling rule of said circuit, wherein said scaling rule specifies said replaced at least one of said predetermined number of attributes depending on a scale of said manufacturing process; wherein said circuit elements comprise transistors, resistors and capacitors, wherein said number of attributes of a transistor comprises a width of a gate channel and its number of interconnects, and wherein said number of attributes of said resistor comprises its resistance, and wherein the number of attributes of a capacitor comprises its capacitance; and wherein said scaling rule comprises a scaling rule for said capacitance as a function of a load, a scaling rule for a resistance as a function of said transistor, a scaling rule for said transistor as a function of said resistance and a scaling rule for said transistor as a function of another transistor of said transistors.