Phase interpolator based output waveform synthesizer for low-power broadband transmitter

摘要

Exemplary embodiments of the present invention relate to an output waveform synthesizer using phase interpolators and an on-chip eye opening monitoring (EOM) circuit for a low-power transmitter. In order to achieve both small area and low-power consumption in the transmitter design, a single-stage multiphase multiplexer operating in subrate is employed. The multiphase multiplexer is composed of parallelized open-drain NAND gates. In subrate transmitter architecture, the phase mismatch among multiphase clock signals degrades jitter performance significantly and is a critical bottleneck for its widespread use despite low power consumption. In order to overcome such mismatch problem, an area-and-power-efficient phase interpolator based waveform synthesizing scheme is developed.

主权项

1. An output waveform synthesizer for low-power broadband transmitter, the output waveform synthesizer comprising:
a 2N number of phase interpolators configured to control rising and falling edges of a N number of different phase clock signals generated by a clock generator, N being a positive even number, wherein an N number of outputs of the 2N number of phase interpolators are inputted as clock signals of an N-to-1 multiplexer; an eye open monitoring unit configured to measure an output of an output driver to quantitatively measure a signal eye diagram of an output of the N-to-1 multiplexer; and a micro controller unit configured to receive the measured signal eye diagram and update phase control codes of the 2N number of phase interpolators using the measured signal eye diagram and a pre-defined calibration algorithm.