发明名称 Probabilistically-banked content addressable memory and storage
摘要 An energy-efficient CAM architecture provides increased speed of searching, reduced power consumption, or a tuned combination of increased speed of searching and reduced power consumption. The CAM comprises a plurality of CAM banks, a plurality of Bloom filters, each Bloom filter associated with a content addressable memory bank, each Bloom filter recording elements inserted into an associated content addressable memory bank, wherein the size of each Bloom filter is configured to reduce energy or power consumption of the content addressable memory apparatus. The size of each Bloom filter may be configured to reduce energy or power consumption of the content addressable memory apparatus.
申请公布号 US8917530(B2) 申请公布日期 2014.12.23
申请号 US201313747166 申请日期 2013.01.22
申请人 University of Rochester 发明人 Soyata Tolga
分类号 G11C15/00;G11C15/04 主分类号 G11C15/00
代理机构 Harris Beach PLLC 代理人 Harris Beach PLLC
主权项 1. A content addressable memory apparatus comprising: a plurality of content addressable memory banks; a plurality of Bloom filters, each Bloom filter associated with said content addressable memory bank, each Bloom filter recording elements inserted into an associated content addressable memory bank; and a FIFO (first in first out) data buffer, controlled by a dynamic voltage and frequency scaling (DVFS) pipeline controller operatively coupled to each content addressable memory bank of said plurality of content addressable memory banks, said dynamic voltage and frequency scaling pipeline controller adapted to dynamically adjust substantially simultaneously said frequency and said voltage of said plurality of content addressable memory banks in response to one or more parameters to reduce a power and energy consumption of said content addressable memory apparatus.
地址 Rochester NY US