发明名称 Semiconductor packages and methods of packaging semiconductor devices
摘要 Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having first and second major surfaces and a plurality of via contacts extending through the first to the second major surfaces of the base substrate. A first conductive layer having a plurality of openings is disposed over the first surface of the base substrate and via contacts. The openings are configured to match conductive trace layout of the package substrate. Conductive traces are disposed over the first conductive layer. The conductive traces are directly coupled to the via contacts through some of the openings of the first conductive layer.
申请公布号 US8916422(B2) 申请公布日期 2014.12.23
申请号 US201313831964 申请日期 2013.03.15
申请人 United Test and Assembly Center Ltd. 发明人 Wang Chuen Khiang
分类号 H01L21/00;H01L23/498;H01L21/768;H05K1/02;H01L21/56 主分类号 H01L21/00
代理机构 Horizon IP Pte. Ltd. 代理人 Horizon IP Pte. Ltd.
主权项 1. A method for forming a semiconductor package comprising: providing a conductive carrier having first and second surfaces; forming a first conductive layer having first and second type openings over the first surface of the conductive carrier; forming conductive traces over the first conductive layer; mounting a die on the first surface of the conductive carrier, the die is coupled to the conductive traces; encapsulating the die with a cap; processing the second surface of the conductive carrier to form via contacts of a package substrate, wherein the conductive traces are directly coupled to the via contacts through the first type openings of the first conductive layer; and forming an insulating layer filling spaces between the via contacts to form a base substrate of the package substrate.
地址 Singapore SG