Semiconductor device having silicide on gate sidewalls in isolation regions

摘要

Provided are a semiconductor device and a method of fabricating the same. According to the semiconductor device, a silicide layer is formed on at least a part of both sidewalls of a gate pattern on a device isolation layer, thereby reducing resistance of the gate pattern. This makes an operation speed of the device rapid. According to the method of the semiconductor device, a sidewall spacer pattern is formed on at least a part of both sidewalls of the gate pattern in following salicide process by entirely or partially removing remaining portions of the sidewall spacer except for portions which are used as an ion implantation mask to form source/drain regions. This can reduce resistance of the gate pattern, thereby fabricating a semiconductor device with a rapid operation speed.

主权项

1. A semiconductor device comprising:
a device isolation layer on a semiconductor substrate to define an active region; a first gate pattern on the active region, the first gate pattern having a first gate silicide layer; a second gate pattern on the device isolation layer, the second gate pattern having a second gate silicide layer; a pair of first sidewall spacer patterns covering both sidewalls of the first gate pattern and both sidewalls of the first gate silicide layer, the pair of first sidewall spacer patterns having the same width; and a pair of second sidewall spacer patterns covering both sidewalls of the second gate pattern without contacting with the second gate silicide layer, the pair of second sidewall spacer patterns having the same width, wherein a width of one of the first sidewall spacer patterns is larger than a width of one of the second sidewall spacer patterns.