Method of manufacturing semiconductor device having chip stacks combined in relation to the number of chips having defects,申请号US201213601088-传众专利搜索

发明名称	Method of manufacturing semiconductor device having chip stacks combined in relation to the number of chips having defects
摘要	After stacking m wafers in each of which a plurality of semiconductor chips are formed, the m wafers are diced to semiconductor chips to form a first chip stack having m of the semiconductor chips stacked, and, after stacking n wafers, the n wafers are diced to semiconductor chips to form a second chip stack having n of the semiconductor chips stacked. Next, the first chip stack is sorted according to the number of defective semiconductor chips included in the first chip stack, and the second chip stack is sorted according to the number of defective semiconductor chips included in the second chip stack. Furthermore, the first chip stack or the second chip stack after sorting are combined to form a third chip stack.
申请公布号	US8916417(B2)	申请公布日期	2014.12.23
申请号	US201213601088	申请日期	2012.08.31
申请人	Kabushiki Kaisha Toshiba	发明人	Higashi Kazuyuki;Sugizaki Yoshiaki
分类号	H01L21/44;H01L21/48;H01L21/50;H01L21/4763;H01L21/82;H01L23/538;H01L21/683;H01L23/00;H01L25/065;H01L25/00;H01L21/66;H01L23/48	主分类号	H01L21/44
代理机构	Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.	代理人	Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项	1. A method of manufacturing a semiconductor device, comprising: after stacking m wafers (where m is a number of two or more) in each of which a plurality of semiconductor chips are formed, dicing the m wafers to semiconductor chips to form first chip stacks each having m of the semiconductor chips stacked; after stacking n of the wafers (where n is a number of two or more), performing dicing of the n wafers on the basis of the semiconductor chips to form second chip stacks each having n of the semiconductor chips stacked; sorting the first chip stacks according to the number of defective semiconductor chips included in each of the first chip stacks; sorting the second chip stacks according to the number of defective semiconductor chips included in each of the second chip stacks; and combining the first chip stacks and/or the second chip stacks after sorting to form a third chip stack according to the number of total number of defective semiconductor chips included in first chip stacks or second chip stacks that are to be combined, wherein the third chip stack is combined by selecting semiconductor chips from the first chip stacks and/or the second chip stacks such that a number of non-defective semiconductor chips included in the third chip stack is p, p being an integer that meets m<p and n<p.
地址	Tokyo JP