Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructions

摘要

The disclosed embodiments relate to a system that executes program instructions on a processor. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system speculatively executes subsequent instructions in a lookahead mode to prefetch future loads. When an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to a corresponding architectural register. Instead the architectural register is marked as invalid. Note that by not updating architectural registers during lookahead mode, the system eliminates the need to checkpoint the architectural registers prior to entering lookahead mode.

主权项

1. A method for executing program instructions on a processor, comprising:
issuing instructions for execution during a normal-execution mode; and upon encountering an unresolved data dependency during execution of an instruction in the normal-execution mode, transitioning execution from the normal-execution mode to a lookahead mode, wherein executing in the lookahead mode comprises:
checkpointing state information for the processor;speculatively executing subsequent instructions to prefetch future loads; andwhen an instruction from the subsequent instructions retires during the lookahead mode, not copying a working register which serves as a destination register for the instruction to a corresponding architectural register and instead marking the architectural register as invalid, wherein marking architectural registers as invalid instead of copying corresponding working registers to the architectural registers while executing instructions during the lookahead mode eliminates the need to checkpoint the architectural registers prior to entering the lookahead mode.