Semiconductor package including multiple chips and memory system having the same

摘要

A package includes a master chip including a storage circuit configured to store an impedance setting of the master chip and an impedance setting of a slave chip, and a termination circuit for an impedance matching with an outside of the package, and the slave chip connected to the master chip, wherein if a termination operation for the slave chip is activated, the termination circuit of the master chip performs an impedance matching operation using the impedance setting for the slave chip.

主权项

1. A semiconductor package comprising:
a master chip and a slave chip in communication with the master chip, the master chip including:
a storage circuit configured to store an impedance setting of the master chip and an impedance setting of the slave chip, anda termination circuit to match an impedance value external to the semiconductor to the impedance setting of the master chip or the slave chip, wherein, if a termination operation for the slave chip is activated, then the termination circuit is to match the impedance value external to the semiconductor package to the impedance setting of the slave chip.