Compound semiconductor device with mesa structure

摘要

A compound semiconductor device having mesa-shaped element region, and excellent characteristics are provided. The compound semiconductor device has: an InP substrate; an epitaxial lamination mesa formed above the InP substrate and including a channel layer, a carrier supply layer above the channel layer and a contact cap layer above the carrier supply layer; ohmic source electrode and drain electrode formed on the cap layer; a recess formed by removing the cap layer between the source and drain electrodes, and exposing the carrier supply layer; an insulating film formed on the cap layer and retracted from an edge of the cap layer away from the recess; a gate electrode extending from the carrier supply layer in the recess to outside of the mesa; and air gap formed by removing side portion of the channel layer facing the gate electrode outside the mesa.

主权项

1. A method for manufacturing a compound semiconductor device, comprising steps of:
(A) growing an epitaxial lamination above an InP substrate, said epitaxial lamination including a channel layer, a carrier supply layer and a contact cap layer in this order from a lower level, and etching said contact cap layer, said carrier supply layer and said channel layer to form a mesa, the mesa having a side surface exposing side surfaces of the contact cap layer, the carrier supply layer, and the channel layer; (B) forming a pair of ohmic electrodes on said contact cap layer, said pair of ohmic electrodes being a source electrode and a drain electrode; (C) forming an insulating film on said contact cap layer, said insulating film covering said source electrode and said drain electrode, and forming an opening in the insulating film by dry-etching said insulating film between said pair of ohmic electrodes; (D) selectively wet-etching said contact cap layer via said opening to form a recess broader than said opening in the insulating film and to expose said carrier supply layer; (E) etching and removing a portion of said insulating film at least in an area located above said recess; (F) forming a resist pattern traversing said mesa, the resist pattern having a gate electrode opening exposing the side surface of said mesa; (G) side-etching said channel layer exposed at the side surface of said mesa via said gate electrode opening by wet etching to form an air gap portion; and (H) forming a metal layer on a semiconductor surface exposed in said gate electrode opening and on said resist pattern, performing lift-off to form a gate electrode extending from said carrier supply layer to outside of said mesa.