发明名称 DISPLAY PANEL AND METHOD FOR MANUFACTURING SAME
摘要 A display panel where, within at least one aperture, an inter-layer insulation layer includes a planar region having a planar surface and a protruding region having a protruding surface relative to the planar region located wherever two or more of a gate electrode, a drain electrode, a source electrode, a first power supply signal wiring, and a second power supply signal wiring intersect, and an insulation film covers at least part of the protruding region and does not cover at least part of the planar region.
申请公布号 US2014367669(A1) 申请公布日期 2014.12.18
申请号 US201314375250 申请日期 2013.01.31
申请人 PANASONIC CORPORATION 发明人 Takeuchi Takayuki;Hotta Sadayoshi
分类号 H01L27/32;H01L51/56;H01L51/50 主分类号 H01L27/32
代理机构 代理人
主权项 1. A display panel, comprising: a transistor array in which a plurality of drive units each including a thin-film transistor are arranged in a matrix, the thin-film transistor including a gate electrode, a gate insulation film opposite the gate electrode, a semiconductor layer opposite the gate electrode across the gate insulation film, and a pair of a source electrode and a drain electrode electrically connected to the semiconductor layer; an inter-layer insulation layer arranged above the transistor array; a partition layer arranged above the inter-layer insulation layer and partitioning a plurality of apertures in the matrix; a pixel electrode arranged above the inter-layer insulation layer for each of the apertures; a light-emitting layer arranged above the pixel electrode in each of the apertures; and an insulation film arranged between the pixel electrode and the light-emitting layer, wherein the transistor array includes first power supply signal wiring arranged in a row direction and second power supply signal wiring arranged in a column direction, within at least one of the apertures, the inter-layer insulation layer includes a planar region having a planar surface and a protruding region having a protruding surface, relative to the planar region, located wherever two or more of the gate electrode, the drain electrode, the source electrode, the first power supply signal wiring, and the second power supply signal wiring intersect, and the insulation film covers at least part of the protruding region and does not cover at least part of the planar region.
地址 Osaka JP