发明名称 |
METHOD FOR MANUFACTURING ELECTRONIC DEVICE |
摘要 |
A method includes the stage of partially removing a first insulator layer to form an opening passing through the first insulator layer by plasma etching using a gas of a first type, and the stage of partially removing a second insulator layer to form an opening passing through the second insulator layer by plasma etching using a gas of a second type. The gas of a first type contains a first component capable of etching the first insulator layer, and a gas of the second type contains a second component different from the first component, capable of etching the second insulator layer and a third component having a higher deposition ability than the second component. |
申请公布号 |
US2014370710(A1) |
申请公布日期 |
2014.12.18 |
申请号 |
US201414300096 |
申请日期 |
2014.06.09 |
申请人 |
CANON KABUSHIKI KAISHA |
发明人 |
Kitamura Shingo;Kato Aiko |
分类号 |
H01L31/0232;H01L21/311 |
主分类号 |
H01L31/0232 |
代理机构 |
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代理人 |
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主权项 |
1. A method for manufacturing an electronic device, comprising forming a hole in a multilayer insulator film including a first insulator layer overlying a substrate, a second insulator layer disposed between the substrate and the first insulator layer and made of a different material from the first insulator layer, and a third insulator layer disposed between the second insulator layer and the substrate and made of a different material from the second insulator layer, the forming of the hole including:
partially removing the first insulator layer to form an opening passing through the first insulator layer by plasma etching using a gas of a first type containing a first component capable of etching the first insulator layer; partially removing the second insulator layer to form an opening passing through the second insulator layer by plasma etching using a gas of a second type containing a second component different form the first component, capable of etching the second insulator layer, and a third component having a higher deposition ability than the second component; and partially removing the third insulator layer to form an opening passing through the third insulator layer by plasma etching using a gas of the first type. |
地址 |
Tokyo JP |