MOLD CAP FOR SEMICONDUCTOR DEVICE

摘要

A semiconductor package has a substrate with a solder mask layer, and upper and lower surfaces. Conductive traces and electrical contacts are formed on the substrate, and vias are formed in the substrate to electrically connect the conductive traces and electrical contacts. A semiconductor die is attached on the upper surface of the substrate. A mold cap is formed on the upper surface of the substrate and covers the die and the conductive traces. The mold cap includes a mold body having clipped corners and extensions that extend from each of the clipped corners. The extensions and clipped corners help prevent package cracking.

主权项

1. A semiconductor package, comprising:
a substrate having an upper surface, a lower surface, and outer peripheral edges, wherein a plurality of conductive traces are formed on the upper surface of the substrate, a plurality of electrical contacts are formed on the lower surface of the substrate, and a plurality of vias are formed in the substrate to electrically connect the plurality of conductive traces and electrical contacts; a solder mask formed over and covering the substrate upper surface; a semiconductor die attached on the upper surface of the substrate; and a mold cap, formed on the upper surface of the substrate to cover the conductive traces, the semiconductor die, and at least part of the solder mask, wherein the mold cap includes,
a mold body having chamfered corners, anda plurality of extensions respectively extending from each the chamfered corners, wherein the extensions extend from the chamfered corners towards the edges of the substrate and distal ends of the extensions are spaced from the substrate edges.