发明名称 Quantization Noise Coupling Delta Sigma ADC with a Delay in the Main DAC Feedback
摘要 A delta-sigma modulator has a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function, a second summing point adding an output signal from said transfer function to the input signal and subtracting a second feedback signal, a first integrator receiving an output signal from the second summing point, a quantizer receiving an output signal from the integrator and generating an output bitstream, and a digital-to-analog converter receiving the bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.
申请公布号 US2014368365(A1) 申请公布日期 2014.12.18
申请号 US201414301948 申请日期 2014.06.11
申请人 Microchip Technology Incorporated 发明人 Quiquempoix Vincent;Vaucher Fabien
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项 1. A delta-sigma modulator comprising: a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function; a second summing point adding an output signal from said transfer function to said input signal and subtracting a second feedback signal; a first integrator receiving an output signal from said second summing point; a quantizer receiving an output signal from said integrator and generating an output bitstream; a digital-to-analog converter receiving said bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay.
地址 Chandler AZ US