Method And Apparatus For Program And Erase Of Select Gate Transistors

摘要

Techniques are provided for programming select gate transistors in connection with the programming of a set of memory cells. In response to a program command to program memory cells, the select gate transistors are read to determine whether their Vth is below an acceptable range, in which case the select gate transistors are programmed before the memory cells. Or, a decision can be made to program the select gate transistors based on a count of program-erase cycles, whether a specified time period has elapsed and/or a temperature history of the non-volatile storage device.

主权项

1. A method for performing a programming operation in a non-volatile storage device, comprising:
determining that a program command has been made to program a plurality of non-volatile storage elements of a plurality of NAND strings on a substrate; in response to the determining that the program command has been made, determining whether a condition is met for programming select gate transistors of the plurality of NAND strings; and in response to the determining that the program command has been made and the condition is met for programming the select gate transistors: before programming the plurality of non-volatile storage elements, performing a programming operation for the select gate transistors by performing one or more program-verify iterations, each program-verify iteration of the one or more program-verify iterations comprises a program portion during which a program pulse is applied to control gates of the select gate transistors, and a verify portion during which a program-verify test is performed for the select gate transistors.