| 发明名称 |
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD |
| 摘要 |
A multilayer wiring in a semiconductor device includes a first lower wiring formed in a first insulating layer, a via which is formed in a second insulating layer over the first insulating layer and which is connected to the first lower wiring, and an upper wiring connected to the via. The upper wiring has an outer edge at which a nick portion is formed beside a portion of the upper wiring to which the via is connected. The formation of the nick portion at the outer edge of the upper wiring prevents the via from enlarging. |
| 申请公布号 |
US2014367861(A1) |
申请公布日期 |
2014.12.18 |
| 申请号 |
US201414293435 |
申请日期 |
2014.06.02 |
| 申请人 |
FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
Uchino Yasunori;Watanabe Kenichi |
| 分类号 |
H01L23/48;G06F17/50;H01L21/768 |
主分类号 |
H01L23/48 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor device comprising:
a first insulating layer; a first wiring formed in the first insulating layer; a second insulating layer formed over the first insulating layer; a via formed in the second insulating layer and connected to the first wiring; a second wiring formed in the second insulating layer, and connected to the via at a portion of the second wiring; and a first nick portion located at an outer edge of the second wiring beside the portion of the second wiring. |
| 地址 |
Yokohama-shi JP |
