| 发明名称 |
DUTY RATE DETECTER AND SEMICONDUCTOR DEVICE USING THE SAME |
| 摘要 |
A duty rate detection circuit includes a duty rate detection block suitable for outputting a duty rate detection signal by detecting a duty rate of a clock signal having a first logic duration and a second logic duration and an output control block suitable for comparing the number of the first logic duration and the number of the second logic duration for a detection period and controlling an output moment of the duty rate detection signal. |
| 申请公布号 |
US2014368245(A1) |
申请公布日期 |
2014.12.18 |
| 申请号 |
US201314090795 |
申请日期 |
2013.11.26 |
| 申请人 |
SK hynix Inc. |
发明人 |
AHN Sung-Ho |
| 分类号 |
H03K3/017 |
主分类号 |
H03K3/017 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A duty rate detection circuit comprising:
a duty rate detection block suitable for outputting a duty rate detection signal by detecting a duty rate of a clock signal having a first logic duration and a second logic duration; and an output control block suitable for comparing the number of the first logic duration and the number of the second logic duration for a detection period and controlling an output moment of the duty rate detection signal, wherein the duty rate detection block includes a duty rate discharge unit for performing a discharge operation during each of the first logic duration and the second logic duration and is designed as a current mirror type. |
| 地址 |
Gyeonggi-do KR |
