发明名称 SYSTEM AND A METHOD FOR DESIGNING A HYBRID MEMORY CELL WITH MEMRISTOR AND COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR
摘要 The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.
申请公布号 US2014369108(A1) 申请公布日期 2014.12.18
申请号 US201414474339 申请日期 2014.09.02
申请人 Khalifa University of Science, Technology & Research 发明人 MOHAMMAD Baker Shehadah;AL-HOMOUZ Dirar
分类号 G06F17/50;G11C13/00 主分类号 G06F17/50
代理机构 代理人
主权项 1. A hybrid non-volatile memory cell system and a hybrid memory array architecture for designing an integrated circuit (IC), the system comprising: a set of at-least one or more transistors, wherein the set of at-least one or more transistors are Complementary Metal Oxide Semiconductor (CMOS); a memristor for storing a data based on a resistance value; a word line for accessing the hybrid non-volatile memory system; and a set of at-least two bit lines for transferring a data from a hybrid non-volatile memory system; wherein the memristor is connected to the at-least one or more transistors, and wherein a gate terminals of the at-least one or more transistors are coupled together.
地址 Abu Dhabi AE