发明名称 Converting conditional short forward branches to computationally equivalent predicated instructions
摘要 <p>In an arrangement for processing conditional branches, a conditional short forward branch (101, fig. 1) is fetched 321. The conditional short forward branch includes a conditional branch instruction (103, fig. 1) that branches to a target instruction. One or more sequentially following instructions (102, fig. 1) which follow between branch instruction in program order and the forward branch target instruction (106, fig. 1), i.e. what is sometimes termed the not taken path. The conditional short forward branch is converted 322 to a computationally equivalent set of predicated instructions and during conversion possibly hardware conversion at a pipeline decode stage the conditional branch instruction may be eliminated. Signals, representing the predicated instructions, may be output regardless of whether the conditional branch is predicted to be taken or not taken and without necessarily knowing any branch prediction. Preferably, back-end logic executes the predicated instructions and determines whether or not the conditional branch should have been taken. If the branch either (a) should or (b) should not have been taken then the architectural state is respectively either (a) not updated or (b) updated to reflect the execution.</p>
申请公布号 GB2515148(A) 申请公布日期 2014.12.17
申请号 GB20140004723 申请日期 2014.03.17
申请人 INTEL CORPORATION 发明人 EDWARD T GROCHOWSKI;MARTIN G DIXON;YAZMIN A SANTIAGO;MISHALI NAIK
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
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