发明名称 Method of forming a thin film transistor using a gray-scale photoresist
摘要 A method of making a thin film transistor device includes: forming a semiconductor layer, a dielectric layer, and a gate-forming layer on the dielectric layer to define a layered structure, forming a gray scale photoresist pattern on the gate-forming layer, stripping the gray scale photoresist pattern isotropically to cause removal of source and drain defining regions, etching the gate-forming layer anisotropically so as to remove source and drain covering region, doping a first type dopant into source and drain regions, and removing a gate defining region from the gate-forming layer.
申请公布号 US8912058(B2) 申请公布日期 2014.12.16
申请号 US201314026166 申请日期 2013.09.13
申请人 发明人 Hsieh Incha
分类号 H01L21/00;H01L21/84;H01L21/3213;H01L29/786;H01L29/66;H01L27/12 主分类号 H01L21/00
代理机构 Vedder Price PC 代理人 Vedder Price PC
主权项 1. A method of making a thin film transistor device, comprising: (a) forming a semiconductor layer on a substrate; (b) forming a dielectric layer on the semiconductor layer; (c) forming a gate-forming layer on the dielectric layer such that the gate-forming layer cooperates with the dielectric layer and the semiconductor layer to define a layered structure; (d) forming a first gray scale photoresist pattern on the gate-forming layer such that the first gray scale photoresist pattern overlaps a first transistor-forming region of the layered structure, the first gray scale photoresist pattern including a first source defining region, a first drain defining region, and a first gate defining region which has a height with respect to the gate-forming layer greater than those of the first source defining region and the first drain defining region; (e) stripping the first gray scale photoresist pattern isotropically to cause thinning of the first gate defining region of the first gray scale photoresist pattern and removal of the first source defining region and the first drain defining region of the first gray scale photoresist pattern from the first transistor-forming region of the layered structure so as to expose a first source covering region and a first drain covering region of the gate-forming layer; (f) etching the gate-forming layer anisotropically so as to remove the first source covering region and the first drain covering region of the gate-forming layer from the dielectric layer after step (e) to form a first gate electrode of the gate-forming layer and to expose two first cover regions of the dielectric layer that correspond respectively to a first source region and a first drain region of the semiconductor layer; (g) doping a first type dopant into the first source region and the first drain region of the semiconductor layer after step (f); and (h) removing the first gate defining region of the first gray scale photoresist pattern from the gate-forming layer after step (g).
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