发明名称 |
EL display panel, power supply line drive apparatus, and electronic device |
摘要 |
Disclosed herein is an electroluminescence display panel including a pixel circuit, a signal line, a scan line, a drive power supply line, a common power supply line, a power supply line drive circuit, a high-potential power supply line, and a low-potential power supply line. |
申请公布号 |
US8912988(B2) |
申请公布日期 |
2014.12.16 |
申请号 |
US201414269644 |
申请日期 |
2014.05.05 |
申请人 |
Sony Corporation |
发明人 |
Tomida Masatsugu;Asano Mitsuru |
分类号 |
G09G3/30;G09G3/32 |
主分类号 |
G09G3/30 |
代理机构 |
Rader, Fishman & Grauer PLLC |
代理人 |
Rader, Fishman & Grauer PLLC |
主权项 |
1. An electroluminescence display device comprising a plurality of pixel circuits and a pixel driving circuit,
wherein each of the plurality of pixel circuits includes an electroluminescence element, and wherein in a layout pattern of the pixel driving circuit:
an output line is electrically directly connected to a first source/drain region of a first transistor of a buffer circuit and a first source/drain region of a second transistor of the buffer circuit, a row of pixel circuits being electrically directly connected to said output line;a different output line is electrically directly connected to a first source/drain region of a third transistor of a different buffer circuit and a first source/drain region of a fourth transistor of the different buffer circuit, a different row of pixel circuits being electrically directly connected to said different output line;a high-potential power supply line is electrically directly connected a second source/drain region of the first transistor to a second source/drain region of the third transistor, said high-potential power supply line not crossing said output line or said different output line;a low-potential power supply line is electrically directly connected a second source/drain region of the second transistor to a second source/drain region of the fourth transistor, said low-potential power supply line not crossing said output line or said different output line, wherein the high-potential power supply line and the low-potential power supply line are extending in a column direction, and wherein the high-potential power supply line and the low-potential power supply line are disposed on an input side of the buffer circuit. |
地址 |
Tokyo JP |