发明名称 |
Conductive path in switching material in a resistive random access memory device and control |
摘要 |
A non-volatile memory device structure. The device structure includes a first electrode, a second electrode, a resistive switching material comprising an amorphous silicon material overlying the first electrode, and a thickness of dielectric material having a thickness ranging from 5 nm to 10 nm disposed between the second electrode and the resistive switching layer. The thickness of dielectric material is configured to electrically breakdown in a region upon application of an electroforming voltage to the second electrode. The electrical breakdown allows for a metal region having a dimension of less than about 10 nm by 10 nm to form in a portion of the resistive switching material. |
申请公布号 |
US8912523(B2) |
申请公布日期 |
2014.12.16 |
申请号 |
US201313870919 |
申请日期 |
2013.04.25 |
申请人 |
Crossbar, Inc. |
发明人 |
Jo Sung Hyun |
分类号 |
H01L29/08;H01L29/417;H01L29/49;H01L45/00 |
主分类号 |
H01L29/08 |
代理机构 |
Ogawa P.C. |
代理人 |
Ogawa P.C. |
主权项 |
1. A device including a non-volatile memory device comprising:
a first electrode disposed upon a semiconductor substrate; a second electrode comprising a metal material; a resistive switching material layer comprising an amorphous silicon material overlying the first electrode; a dielectric material layer disposed between the second electrode and the resistive switching material layer, the dielectric material layer being sufficiently thin to electrically breakdown in a region when a first voltage is applied to the second electrode and to cause formation of an electrical breakdown open region in a portion of the dielectric material layer, the electrical breakdown open region having a first dimension to allow a first metal region to form within the portion of the dielectric material layer and extending in a portion of the resistive switching material layer from the metal material; and a buffer material layer comprising a p+polycrystalline silicon-containing material disposed between the first electrode and the resistive switching material layer to control an interfacial defect level between the first electrode and the resistive switching material layer; and wherein the non-volatile memory device includes at least the buffer material layer, the dielectric material layer, the resistive switching material layer and a portion of the second electrode. |
地址 |
Santa Clara CA US |