Electrical fuse structure and method of fabricating same

摘要

A high programming efficiency electrical fuse is provided utilizing a dual damascene structure located atop a metal layer. The dual damascene structure includes a patterned dielectric material having a line opening located above and connected to an underlying via opening. The via opening is located atop and is connected to the metal layer. The dual damascene structure also includes a conductive feature within the line opening and the via opening. Dielectric spacers are also present within the line opening and the via opening. The dielectric spacers are present on vertical sidewalls of the patterned dielectric material and separate the conductive feature from the patterned dielectric material. The presence of the dielectric spacers within the line opening and the via opening reduces the area in which the conductive feature is formed. As such, a high programming efficiency electrical fuse is provided in which space is saved.

主权项

1. A semiconductor structure comprising:
an electrical fuse located perpendicular to a surface of a semiconductor chip and comprising: a patterned dielectric material of unitary construction and comprising a single dielectric material composition and including a via opening and a line opening located atop a metal layer, wherein the line opening is located above and connected to the via opening and the via opening is located above and connected to the metal layer, wherein said metal layer is a continuous material layer that extends beneath the entirety of the patterned dielectric material; a conductive feature including at least a diffusion barrier and a conductive material present in the via opening and line opening, wherein said diffusion barrier is continuously present in said via opening and said line opening; and dielectric spacers selected from the group consisting of silicon oxide, silicon nitride, silicon carbide and silicon oxynitride located directly on sidewalls of the patterned dielectric material within the via opening and the line opening and separating the conductive feature from said sidewalls of the patterned dielectric material, wherein topmost surfaces of said diffusion barrier, said conductive material and each of said dielectric spacers in said line opening are coplanar with a topmost surface of said patterned dielectric material.