Photoelectric conversion device and electronic device having the same

摘要

A plurality of transistors in which ratios of a channel length L to a channel width W, α=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of α can be driven in a linear range with low illuminance, and a transistor with small amount of α can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.

主权项

1. A semiconductor device comprising:
a first current mirror circuit comprising:
a first transistor;a second transistor; anda third transistor; a second current mirror circuit comprising:
a fourth transistor; anda fifth transistor; a photoelectric conversion element; a first resistor; a second resistor; a third resistor; and an output terminal, wherein the first transistor and the fourth transistor are each a diode-connected transistor, wherein one of a source and a drain of the second transistor and one of a source and a drain of the third transistor are each electrically connected to one of a source and a drain of the fourth transistor and one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is directly connected to a first electrode of the photoelectric conversion element, wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the first transistor, wherein a second electrode of the photoelectric conversion element is directly connected to the other of the source and the drain of the first transistor, the other of the source and the drain of the second transistor, and the other of the source and the drain of the third transistor, wherein ratios of a channel length to a channel width of the second transistor and the third transistor are different from each other, wherein a first terminal of the first resistor is electrically connected to the one of the source and the drain of the second transistor, wherein a first terminal of the second resistor is electrically connected to the one of the source and the drain of the third transistor, and wherein a first terminal of the third resistor is electrically connected to a second terminal of the first resistor, a second terminal of the second resistor, and the output terminal.