发明名称 Semiconductor wafer bonding incorporating electrical and optical interconnects
摘要 Methods for bonding semiconductor wafers requiring the transfer of electrical and optical signals between the bonded wafers and across the bonding interface. The methods incorporate the formation of both electrical and optical interconnect vias within the wafer bonding interface to transfer electrical and optical signals between the bonded wafers. The electrical vias are formed using multiplicity of metal posts each comprised of multiple layers of metal that are interfused across the bonding surface. The optical vias are formed using multiplicity of optical waveguides each comprised of a dielectric material that interfuses across the bonding interface and having an index of refraction that is higher than the index of refraction of the dielectric intermediary bonding layer between the bonded wafers. The electrical and optical vias are interspersed across the bonding surface between the bonded wafers to enable uniform transfer of both electrical and optical signals between the bonded wafers.
申请公布号 US8912017(B2) 申请公布日期 2014.12.16
申请号 US201213463130 申请日期 2012.05.03
申请人 Ostendo Technologies, Inc. 发明人 El-Ghoroury Hussein S.;Chuang Chih-Li;Yadavalli Kameshwar;Fan Qian
分类号 H01L21/00;H01L21/18;H01L27/146 主分类号 H01L21/00
代理机构 Blakely Sokoloff Taylor & Zafman LLP 代理人 Blakely Sokoloff Taylor & Zafman LLP
主权项 1. A method for the bonding of a III-V semiconductor wafer to a CMOS silicon wafer comprising: forming bonding surfaces on the wafers for the transfer of electric signals between the bonded wafers by: forming a dielectric intermediary bonding layer on a surface of each wafer, within which surface is embedded electrical interconnects for the transfer of electrical signals; respectively; planarizing the surfaces of the dielectric intermediary bonding layers of the two wafers; interfusing the electrical interconnects and the dielectric intermediary bonding layer on the wafers to bond the wafers together with electrical interconnections between the wafers; wherein the density of the electrical interconnects across the bonding interface is more than one million electrical interconnects per square centimeter; wherein the III-V semiconductor wafer is a photonic wafer comprising multiple III-V material layers deposited on an epitaxial growth substrate and cross etched to delineate an array comprising a multiplicity of photonic elements, and further cross etched to delineate the die boundaries of the array.
地址 Carlsbad CA US