ESD protection circuit

摘要

A multi-fingered gate transistor formed in a substrate of one conductivity type overlying a well of a second conductivity type. Ohmic contact to the well is made by an implanted region of the second conductivity type that circumscribes the gate transistor. Ohmic contact to the substrate is made by taps located on sides of the gate structure between the gate structure and the well contact. Floating wells are located on opposite sides of the gate structure between the substrate taps and the ends of the gates to isolate these substrate taps and force current flow in the substrate under the gate transistor to be substantially perpendicular to the direction in which the gate fingers extend. This increases the potential difference between these substrate regions and source regions in the gate transistor, thereby aiding the triggering of the parasitic bipolar transistors under adjacent gate fingers into a high current state.

主权项

1. An electrostatic discharge (ESD) protection structure comprising:
a substrate having a first conductivity type; a MOS transistor comprising a plurality of gate fingers on the substrate and source and drain regions formed in the substrate between the gate fingers, the gate fingers extending in a first direction and having first and second ends; a deep well underneath the MOS transistor, the deep well having a second conductivity type; a first ohmic contact to the deep well; a second ohmic contact to the substrate, the second ohmic contact being located between the first ends of the gate fingers and the first ohmic contact; and a floating well located between the second ohmic contact and the first ends of the gate fingers, the floating well having the second conductivity type.